Implement a motor-control FSM with synchronous active-low reset. After reset is released, pulse f high for one clock cycle, then search x for the sequence 1,0,1 in three successive samples. Assert g starting in the cycle after the sequence is detected. Keep g high while checking y during the next two clock cycles: if y is high in either cycle, keep g high permanently until reset; if y stays low for both cycles, set g low permanently until reset. The FSM does not inspect x until after the f pulse.